Search found 89 matches

by IvanG
Thu Jul 15, 2010 8:54 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: DES Cracker BETA
Replies: 137
Views: 135802

Re: DES Cracker BETA

Поставить CUDA SDK 3.0/3.1. И закомпилить :).
by IvanG
Fri Jan 15, 2010 1:47 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: CUDA supported bruteforcers
Replies: 35
Views: 22179

Re: CUDA supported bruteforcers

Funny, how close the compiler can come to highly optimized assembly, not? The problem (for me at least) that it isn't possible to write directly in GPU assembly. Brook+ taking C-like code and translate it into ATI's IL (intermediate language), then this IL compiled by calclCompile function from ATI...
by IvanG
Wed Jan 13, 2010 6:32 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: CUDA supported bruteforcers
Replies: 35
Views: 22179

Re: CUDA supported bruteforcers

vampyr wrote:Your cracker, on my box with a single ATI4870x2: 601mhashes/s.
Which is weird actually. I had 590M=290M+300M with 4770+4850, so at 4870x2 it must be at least 20% faster. Which Catalyst version do you use and which ighashgpu version?
by IvanG
Wed Jan 13, 2010 5:24 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: CUDA supported bruteforcers
Replies: 35
Views: 22179

Re: CUDA supported bruteforcers

Also: ihashgpu appears to be a direct copy of some of my old code, as it has exactly the same bugs, and around the same speed (!) Because, hey, look at the post date of my govsec cracker, then at ihashgpu. You're funny boy. How comparing 550M with 720M you ends as "around the same speed"? :P Not me...
by IvanG
Mon Jan 11, 2010 10:26 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: patched ati version
Replies: 10
Views: 7664

Re: patched ati version

No point to argue obviously. Who cares about AMD processors, among all readers of this forum looks like only me having Phenom (and only as separate test machine, my working one is Intel based), it additionally shows how "good" AMD's processors are. No compiler will change this fact :lol:.
by IvanG
Mon Jan 11, 2010 10:17 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: Brook+ news
Replies: 1
Views: 2464

Re: Brook+ news

:crazy:

Go the OpenCL way, I'm still curious how bad will be MD5 at ATI's OpenCL platform but I'm cba to test it by my own :) .

And, well, CAL/IL is also an option :D.
by IvanG
Sat Jan 09, 2010 9:17 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: CUDA supported bruteforcers
Replies: 35
Views: 22179

Re: CUDA supported bruteforcers

network of fifty dell optiplex desktop computers running elcomsoft DPR or is there perhaps a more effective set-up? most of the GPU solutions i have tested seem restricted to one workstation (or perhaps dual CUDA cards in one computer) but do not have proper distributed functions. Depends on what t...
by IvanG
Sat Jan 09, 2010 8:56 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: patched ati version
Replies: 10
Views: 7664

Re: patched ati version

Even though the SSE path is obviously faster on all processors supporting SSE. This is not true. Which I was talking about. Sometimes using SSE can greatly slow down the code instead of accelerating it. Especially this applies for P4 and VIA CPUs, so checking if (we have Intel CPU) and (it supports...
by IvanG
Fri Jan 08, 2010 9:15 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: patched ati version
Replies: 10
Views: 7664

Re: patched ati version

I doubt that ICC intentionally generates slow code for AMD CPUs. I think it's just "we don't care much about selecting best variant for CPUs we aren't producing". ICC produced by Intel for Intel's CPUs, so why it's so strange? No idea. Using SSE2 code and optimizing for particular processor is a tot...
by IvanG
Thu Jan 07, 2010 11:55 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: patched ati version
Replies: 10
Views: 7664

Re: patched ati version

No changes at all for Phenom 9550.
I've just heard few days ago that Intel intentionally chooses slower codepath for AMD.
Doubt it's true. And AMD can always make their own compiler if ICC that bad ;).
by IvanG
Wed Dec 16, 2009 11:26 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: 9+ GPU machine
Replies: 12
Views: 10316

Re: 9+ GPU machine

http://fastra2.ua.ac.be/
The FASTRA II design contains six NVIDIA GTX295 dual-GPU cards, and one GTX275 single-GPU card.
With the help from ASUS they got modified BIOS :).
by IvanG
Sat Dec 05, 2009 5:45 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: article with birth-day attack for md5
Replies: 8
Views: 6238

Re: article with birth-day attack for md5

P.S. just for interest , do you know some documents with timings for every instruction for nvidia's cuda Official CUDA documentation contains this info. Actually not much to document -- almost everything executes in one cycle (i.e. 4 cycles per SM per warp) with some exceptions like 32-bit integer ...
by IvanG
Sat Dec 05, 2009 5:06 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: article with birth-day attack for md5
Replies: 8
Views: 6238

Re: article with birth-day attack for md5

(x<<7) | (x>>25) == (x>>25) + (x * (1<<7)) == (x>>25) + (x * 128),

so l1.x = 25 and l1.y = 128;

Edit: You're fast with editing ;).
by IvanG
Sat Dec 05, 2009 4:31 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: article with birth-day attack for md5
Replies: 8
Views: 6238

Re: article with birth-day attack for md5

Usual rotate: (x<<n) | (x>>(32-n)).

(x<<n) = (x*1)<<n = x * (1<<n), so

(x >> (32 - n)) + (x * (1<<n)), "plus" here equivalent to "logic or" as non-zero bits aren't overlaps.
by IvanG
Sat Dec 05, 2009 2:41 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: article with birth-day attack for md5
Replies: 8
Views: 6238

Re: article with birth-day attack for md5

It works OK. I was testing such constructions earlier but unfortunately there no hardware "integer MAD" instruction neither on ATI or nVidia GPUs, so it'll be translated to usual 2 shifts + OR (or, more correctly, to shift + mul + add which bad for nVidia as 32-bit muls costs more than 32-bit shifts...
by IvanG
Sat Dec 05, 2009 12:53 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: 9+ GPU machine
Replies: 12
Views: 10316

Re: 9+ GPU machine

D3ad0ne wrote:IGhash is actually slower now that they are all working. Once again I think it is over tasking the CPU. Now I just need the dang i9's to come out. :(
Which is strange in fact as without /cpudontcare switch it shouldn't use CPU at all...
by IvanG
Fri Dec 04, 2009 7:27 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: 9+ GPU machine
Replies: 12
Views: 10316

Re: 9+ GPU machine

Congrats on building such system :). Never seen anything like this. Anyway, results aren't looking good for me -- having 4xGTX295 it should be ~8*705M = 5640M for single MD5 with ighashgpu. But your screenshot shows only 5093M. 3 out of 8 GTX295 cores running non optimally and that can be caused by ...
by IvanG
Wed Dec 02, 2009 2:30 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: How high can you get
Replies: 260
Views: 165541

Re: How high can you get

Yes the HD 5000 32kB LDS would help a lot! With a list of 50k passwords, the LDS can be used to reduce memory fetches by a factor of 5x if you used it as a bitmap-based hash table to filter out unnecessary memory accesses (32768*8/50000). So bottom line your code base is inefficient by not using th...
by IvanG
Tue Dec 01, 2009 5:57 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: How high can you get
Replies: 260
Views: 165541

Re: How high can you get

However we all know it sucks because ATI doesn't let Brook+ kernels access the local data share. Without it you can't implement the techniques described by Bars and Bitweasil/Syonyk. Once this is resolved, the gap between single-hash and multi-hash perf will be closed... Actually it's not Brook+ is...
by IvanG
Tue Dec 01, 2009 11:53 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: How high can you get
Replies: 260
Views: 165541

Re:

I can only imagine 12 virtual CPU cores and 7 GTX 380's.. I guess you'll need some serious cooling system in your room. And you're a maniac btw :lol:. I usually get around 3.4 B/sec with 50k list, down from a max of 6B/sec, so a little over half. I would expect around 7B/sec using larger hash list....
by IvanG
Tue Dec 01, 2009 11:27 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: sha 512 decode
Replies: 5
Views: 5573

Re: sha 512 decode

The default number of rounds is 5000. Each round may use up to 3-4 SHA512s. So it means that speed will be even slower than for RAR 3.x archives, in best case -- several thousands per second on top-end GPUs. Cruel world :). I wonder what would be DES speeds for ATI... Seems like that old algorithm ...
by IvanG
Mon Nov 30, 2009 1:23 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: How high can you get
Replies: 260
Views: 165541

Re: How high can you get

D3ad0ne wrote:If my experiment with the extension cables fail I may look at getting a Tesla.
I'm kinda curious how experiments with cables ends ;). Is a first 9+ GPUs system exists?
by IvanG
Mon Nov 30, 2009 1:17 am
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: sha 512 decode
Replies: 5
Views: 5573

Re: sha 512 decode

The speed won't be that bad actually. If it's just single sha-512 transform it'll be still millions per second. Haven't tested sha-512 itself but sha-256 used in acrobat 9+ and it's running at ~70M/sec rate with GTX260 (AFAIR, done this almost year ago). As vars for sha-512 extended to 64 bits (from...
by IvanG
Mon Nov 02, 2009 6:16 pm
Forum: BarsWF, Cryptography, Security, GPGPU and supercomputing
Topic: New codebase testing 0.B version
Replies: 76
Views: 202495

Re: New codebase testing 0.B version

Hmm... actually it is possible to write BIOS by yourself :P Well, it's possible to make hardware MD5 cracker with FPGAs or even better -- design in VHDL and order 40nm MD5 crack specific chips... But somehow I have feelings that nobody will actually do this :lol:. There are problems with ATI GPUs a...